Daniel Keller, Rohit Kumar · 2026 · arXiv
DOI: 10.48550/arXiv.2610.27356 · open-access PDF
펌웨어 진단 기록 (printf)은 전체 칩 SoC 설계 검증에서 필수적인 디버그 도구이지만, 사이클 정확한 RTL 시뮬레이션에 무거운 부담을 부과합니다 : 시뮬레이션 CPU에 30자리, 1자리 메시지를 포맷하고 MMIO 개막을 통해 시리즈화하는 것은 호출당 $3.04 ~ $15.23μ$ (15.27 $μ$ 무중 / Suite A의 $15.08 $μ$ 인쇄 중량 중요한 경로 평균)입니다.
Machine translation (Meta M2M100); the English original follows.
Firmware diagnostic logging (printf) is an essential debug instrument in full-chip SoC design verification, yet it imposes a heavy tax on cycle-accurate RTL simulation: formatting a 30-character, 1-argument message on a simulated CPU and serializing it through an MMIO aperture costs 3.04 to 15.23 $μ$s per call (15.27 $μ$s unweighted / 15.08 $μ$s print-weighted critical-path mean on Suite A). Unlike embedded tokenizers that target flash footprint and wire bytes with offline decoding, RTL simulation is governed by a two-regime cost function---cross-fabric SoC paths are dominated by MMIO bus stal
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